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jelly

处理器 ryuz

Original FPGA platform

Soft-core processors and SoC designs that turn an FPGA into a programmable compute unit.

The project covers topics such as embedded-rust, fpga, fpga-soc, verilog, zynq, zynqmp.

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Stars77
Forks15
LanguageVerilog
LicenseMIT
Last push2026-11-02
Repositoryhttps://github.com/ryuz/jelly
Homepagehttp://ryuz.my.coocan.jp/jelly/index.html
View source and README on GitHub

Topics

embedded-rustfpgafpga-socverilogzynqzynqmp

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