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hdlConvertor

处理器 Nic30

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

Soft-core processors and SoC designs that turn an FPGA into a programmable compute unit.

The project covers topics such as antrl4, fpga, parser, python, systemverilog, systemverilog-parser, verilog, verilog-parser.

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Stars335
Forks81
LanguageC++
LicenseMIT
Last push2025-06-30
Repositoryhttps://github.com/Nic30/hdlConvertor
View source and README on GitHub

Topics

antrl4fpgaparserpythonsystemverilogsystemverilog-parserverilogverilog-parser

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