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parallella-riscv

处理器 eliaskousk

RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards

Soft-core processors and SoC designs that turn an FPGA into a programmable compute unit.

The project covers topics such as gsoc, gsoc-2016, linux-kernel, parallella, petalinux, risc-v, rocket-chip, rocket-core.

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Stars109
Forks29
LanguageSystemVerilog
LicenseNOASSERTION
Last push2018-11-14
Repositoryhttps://github.com/eliaskousk/parallella-riscv
Homepagehttp://eliaskousk.teamdac.com
View source and README on GitHub

Topics

gsocgsoc-2016linux-kernelparallellapetalinuxrisc-vrocket-chiprocket-core

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