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Bunnie Huang Pushes Semi-Open 22nm SoC, With Verifiability as the Point

2026-11-13
Open SourceBunnie Huang PushesSemi-Open 22nm SoC,With Verifiability as…fpga.love
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The barrier to high-assurance computing is not performance but whether every transistor can be traced. Baochip-1x, led by Andrew “Bunnie” Huang, turns that demand into hardware: a 22nm process, a single RISC-V core with an MMU, and both source code and an evaluation board released.

From Precursor to a Standalone SoC

The Baochip-1x design draws heavily on the FPGA-based CPU in the Precursor device, which has been described as a fully verifiable communicator design. The SoC includes an MMU and can run software supporting the RV32IMAC instruction set; it ships with a Coder’s Guide and SystemVerilog and Verilog source code. That means it is aimed not at teams looking to run applications on an off-the-shelf chip, but at those who need to lay the design open and inspect it layer by layer. The semi-open line is this: the source is visible, but not every part of the chain is open.

350MHz Single Core and RRAM Configuration

Inside the chip is a 350 MHz VexRISC-V core, 4 MB of resistive RAM (RRAM) and 2 MB of SRAM, along with a large set of security-related features. RRAM here is not the usual embedded-flash-replacement story; it is tied to storage verifiability in high-assurance scenarios. The company also offers a “Dabao” evaluation board with a form factor close to the Raspberry Pi Pico, plus a DIY assembly process. The real question is how the compute positioning of a 350 MHz single core trades off against the security features; the material does not provide more performance data.

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Three takeaways
  • Baochip-1x uses 22nm and a single 350 MHz VexRISC-V core
  • It has an MMU, can run RV32IMAC software, and provides SV/Verilog source
  • It comes with 4 MB RRAM, 2 MB SRAM and the Dabao evaluation board

What it means for us

For engineers in China working on high-speed interfaces and boards, this chip is not a direct substitute: the 350 MHz single-core, RV32IMAC positioning is not in the main arena of interface throughput or real-time processing. Its reference value is methodological—a semi-open SoC that delivers source code, an evaluation board and documentation together shows that high-assurance design does not have to follow the old path of “black-box chip plus nondisclosure agreement.” If a team is involved in trusted boot, verifiable storage or RISC-V soft-core verification, Baochip-1x’s SystemVerilog source and RRAM configuration are worth taking apart; on the supply chain side, it has not announced volume production or channel information, so it cannot serve as a ready-made option for domestic substitution.

RISC-Vhigh assuranceRRAMopen-source SoC
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