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AXU2CGB-E AMD SoC Development Board
Key specifications
| Model | AXU2CGB-E |
| Device | XCZU2CG |
| Family | AMD SoC Development Board |
| Memory (DDR) | PS: 2 GB DDR4 (4 x 512 MB, 64-bit, 2400 Mbps) |
| Official list price | CNY 3599.00 |
Field values are parsed from the official ALINX product page (spec sheet updated 2026-11-04). Untranslatable Chinese descriptions are omitted rather than machine-translated.
PCIe capability
The official page states the interface in Chinese; the verbatim wording is shown on the Chinese version of this board page rather than machine-translated here.
Structured reading: PCIe Gen2 x1; 5 GT/s per lane; system side only (PS); no PL GT transceivers.
Verdict (compiled by fpga.love): System-side PCIe only (PS side, no PL GT transceivers) - cannot act as a host accelerator card.
Other boards in the same family
Source of record (official ALINX product pages, Chinese, with the full interface list and documentation): https://www.alinx.com/detail/223
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