What the FAQ is an FPGA (Clive…

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Most of them have heard of FPGAs, but all they typically know is that these devices can be programmed to perform different functions -- they don't know how. Similarly, most of them have heard about languages like Verilog and VHDL, but all they typically know is that FPGA designers use these languages to capture the design -- they don't know how these hardware description languages (HDLs) differ from programming languages like C/C++.

In this presentation, engineer, writer, and communicator Max The Magnificent (a legend in his own lunchtime) will rend the veils asunder and reveal all. Max says that we will be leaping from topic to topic with the agility of young mountain goats, so he urges attendees to dress appropriately.

The Bottom Line

Problem: Many embedded developers know FPGAs exist but are unclear how they differ from microcontrollers, how FPGA design flows work, and when to use them. They also worry about practical pitfalls like metastability and radiation effects.

Solution: This talk gives a concise, practical tour of FPGA architecture, the design workflow from HDL → simulation → synthesis → bitstream, and the key techniques that make FPGAs powerful (concurrency, pipelining, loop unrolling, hardware acceleration). It also covers real-world reliability concerns and gives concrete starter hardware/software you can use.

Technical Prerequisites

1. FPGA architecture & configuration

2. Design abstraction & flow

3. Concurrency, pipelining and hardware acceleration

4. Reliability & interfacing

After watching this talk you will be able to: identify when an FPGA is the right tool (massive parallelism, pipelining, custom acceleration) vs when a microcontroller or SoC is better, and understand the practical design path — from HDL/HLS through simulation and synthesis to bitstream — plus the basic reliability practices (synchronizers, ECC/scrubbing, redundancy) needed for robust FPGA use.

Max delivers a pragmatic, example-driven tour that balances architecture, design flow, and hard-earned practical advice (metastability and radiation are treated with the respect they deserve). If you want a clear, approachable bridge from MCU thinking to FPGA thinking — with concrete starter hardware and modern AI/ML hooks — this session is an efficient and motivating place to begin.

This overview is AI-generated from the session transcript. Spot an issue? Let us know .

Why do two concurrent assignments in an HDL like Verilog (e.g., A = B; B = A;) result in the registers swapping values on an FPGA, unlike the equivalent sequential C code which makes them equal?

Which configuration-cell technology "starts off with no link" and creates a permanent connection by applying voltage, and is sometimes used for radiation-resistant programmable logic?

What is the speaker's described worst-case outcome when using a simple two-stage synchronizer to sample an asynchronous input that violates setup/hold time?

Why does the speaker say an FPGA can execute Conway's Game of Life vastly faster than a microcontroller for a large grid?

According to the speaker, what is the practical workflow that lets software developers accelerate slow C/C++ functions using FPGA technology without being full-time hardware designers?

You answered 0 out of 5 questions correctly.

*asterisks* bold surround text with **two asterisks** hyperlink [hyperlink](https://example.com) or just a bare URL inline code surround text with single `backticks` code block (multi-line) wrap on its own lines with three backticks: ``` your code here ``` strikethrough surround text with ~~two tilde characters~~ quote prefix with > Up-to-date Upvotes Newest Oldest Enrique Score: 0 | 8 months ago | 1 reply I've just watched this after watching the talk from one of TinyML authors. Such a great connection between both talks and I really regret not watching this on 2020 itself. There is also another talk about PynQ which suits really well both talks, all three were great. Thanks for the great presentation.

*asterisks* bold surround text with **two asterisks** hyperlink [hyperlink](https://example.com) or just a bare URL inline code surround text with single `backticks` code block wrap on its own lines with three backticks: ``` your code here ``` strikethrough surround text with ~~two tilde characters~~ quote prefix with > Cesar_Santos Score: 1 | 6 years ago | 1 reply Whenever I received an email that this presentation was popular, and later I saw more than 50 comments, definitely I had to see this!!! And I hope doesn't sound repetitive, but congrats for the great presentation! By the way, that was the first time I watched something about FPGA that really made me want to at least play with it :)

Important to note to anyone passing by this presentation, this Questions & Comments section is a valuable add-on to it, worth spending time here reading.

As my question, probably a silly one (or perhaps the hardest possible): one thing I never found out is how really FPGAs are made? Because mostly I've seen so far stops on "logic, reprogrammable blocks + I/O blocks", and for me the answer to my question seems something hidden inside multiple vaults of multi-billion companies, so something extremely proprietary... But, as we are having more "open-source" solutions getting to hardware (from Arduino to RISC-V, OpenPOWER), I'm hoping that there should be some discussion going on somewhere about "design your own FPGA chip". On that, do you have any reference material on how FPGAs are made, or how to do your own FPGA? Even if it's some textbook example/lab exercise on a protoboard would be really helpful. Thanks in advance.

*asterisks* bold surround text with **two asterisks** hyperlink [hyperlink](https://example.com) or just a bare URL inline code surround text with single `backticks` code block wrap on its own lines with three backticks: ``` your code here ``` strikethrough surround text with ~~two tilde characters~~ quote prefix with > MaxTheMagnificent Speaker Score: 0 | 6 years ago | no reply Hi Cesar -- thanks for your kind words -- regarding how FPGAs are made -- I think you are asking about the architecture rather than the fabrication process.Each FPGA has its own architecture -- but they are based on logic cells each containing a look-up table (4-, 5-, 6, 7-, 8-input depending on the FPGA), register, multiplexer, etc.They also have additional stuff for things like carry-forward.Then various types of DSP and memory blocks -- then the interconnect.

The higher-end FPGAs have some very sophisticated interconnect schemes.I'm sure they regard a lot of this as being propitiatory, but if you read their data sheets you can get a lot of nitty-gritty details.

*asterisks* bold surround text with **two asterisks** hyperlink [hyperlink](https://example.com) or just a bare URL inline code surround text with single `backticks` code block wrap on its own lines with three backticks: ``` your code here ``` strikethrough surround text with ~~two tilde characters~~ quote prefix with > Mandeep Score: 1 | 6 years ago | 1 reply Like always, great talk, Sir. Thank you. I have been following you (not in the FBI style) for some time now, and you really are magnificent. Not only you explain complex things in a simple manner, but with the awesome diagrams, your explanations become even more fantastic. More power to you.

*asterisks* bold surround text with **two asterisks** hyperlink [hyperlink](https://example.com) or just a bare URL inline code surround text with single `backticks` code block wrap on its own lines with three backticks: ``` your code here ``` strikethrough surround text with ~~two tilde characters~~ quote prefix with > AndrewSZ Score: 2 | 6 years ago | 1 reply Hi Max, I just watched the video presentation and it's a great intro to FPGAs and the twist in logic needed to build code around them! And perhaps you won't get a chance to answer because the "live" part of the event ended. However, how much massaging needs to be done from a working FPGA design to an ASIC? It's the one step I haven't done yet ;-) Your talking about radiation reminded me of my days in Aerospace!

*asterisks* bold surround text with **two asterisks** hyperlink [hyperlink](https://example.com) or just a bare URL inline code surround text with single `backticks` code block wrap on its own lines with three backticks: ``` your code here ``` strikethrough surround text with ~~two tilde characters~~ quote prefix with > MaxTheMagnificent Speaker Score: 0 | 6 years ago | 1 reply Hi Andrew -- oooh, that's a tricky one.Altera (now Intel) have a route to convert some of their FPGAs to ASICs/SOCs, but for most of the vendors it's a real pain -- the third party IP blocks are different, and the clocking schemes, and ...it just goes on.There was an startup FPGA company a couple of years ago that had a great solution, but they faded away (sad face).

Actually, I think a relatively new company called Efinix may have a solution -- check out this column: https://www.digikey.com/en/articles/techzone/2020/mar/implement-edge-computing-using-efinix-quantum-enabled-fpgas

What the FAQ is an FPGA (Clive "Max" Maxfield, EOC 2020)