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Running LFM2.5 and Qwen3 on Inspur YPCB-00338 Kintex-7 PCIe Card

Elecfans ·
This is a machine translation of the Chinese original (~4529 words), with the original images mirrored on this site; for details please refer to the source page.

The following article is from Open FPGA, by Suisuisui.

First, to judge whether an open-source accelerator is worth studying, look at three things.

After reviewing this project, a set of general criteria for evaluating similar open-source hardware can be distilled:

First, reproducibility: Are the simulator, compiler, instruction set, and RTL all complete, and can they run without hardware first?

Second, data transparency: Are there real board throughput, quantization, and overhead figures, rather than only "theoretical peak" numbers?

Third, barrier design: Does it separate "viewers" from "board buyers," so learners don't have to spend money first?

If all three hold true, the open-source project is very likely worth spending a few days reading the source code (or spending tokens to study).

This project basically meets the above criteria -- OpenTPU.

This project opens the RTL, ISA, simulator, and compiler, and runs LFM2.5 and Qwen3 on the Inspur YPCB-00338 Kintex-7 PCIe card (Kintex-7 xc7k480t FPGA, two 2 GiB DDR3 channels, PCIe Gen2 x8).

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This project builds openTPU, with the goal of making an AI accelerator easy to understand from the Python kernel all the way down to the hardware level. It now runs on the Inspur YPCB-00338 card, which is equipped with a Xilinx Kintex-7 xc7k480t and 4 GiB DDR3 memory, to execute language models.

The codebase includes SystemVerilog RTL, the instruction set, a bit-exact simulator, the kernel language/compiler, a profiler, and Linux host tools. The project is also an experiment in using AI agents for hardware development.

The animation demonstrates LFM2.5-230M chatting via otpu-chat, while otpu-smi shows utilization and DRAM bandwidth.

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The board connects via PCIe Gen2 x8 and provides two 2 GiB DDR3 memory channels. The current design combines a four-column systolic array unit, eight vector lanes, a LiteDRAM memory controller, and a sequencer for explicitly scheduling data transfers and computation. The matrix unit handles int8 operands; the vector unit handles fp32 operations; and the quantization mechanism connects the two.

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Using 4-bit weights and an int8 LM head, the README reports a token processing speed of 82.1 tokens/s for LFM2.5-230M and 30.7 tokens/s for Qwen3-0.6B (including host overhead). The protocol generates 64 greedy tokens after a 512-token prompt. Quantization accuracy trade-offs and the test flow are documented in the codebase.

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The simulator and software run on a laptop. Clone the codebase, install the Python packages and their dependencies, then download LiquidAI/LFM2.5-230M:

git clone https://github.com/FeSens/openTPU.git cd openTPU pip install -e . pip install pytest torch transformers hf download LiquidAI/LFM2.5-230M --local-dir models/LFM2.5-230M otpu-chat --model lfm2 --backend isa

This board guide covers Vivado, bitstream generation, JTAG programming, PCIe setup, DDR3 calibration, and diagnostics. Building this Kintex-7 requires a Vivado license that includes xc7k480t. RTL testing requires Verilator 5.

https://github.com/FeSens/openTPU/blob/main/docs/board.md

https://github.com/FeSens/openTPU/blob/main/docs/isa.md

https://github.com/FeSens/openTPU/blob/main/docs/lens.md

The project code is licensed under Apache-2.0. You are welcome to contribute board-level porting code, provide build feedback, and offer suggestions to make the accelerator easier to learn and reproduce.

https://github.com/FeSens/openTPU

Original title: No need to buy dedicated chips—can a second-hand FPGA also run Qwen3?

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Read Original →
Source: Elecfans