


Recently, the "2026 Pango Micro Developer Conference," themed "Reshaping Computing Value, Intelligence Creating Boundless Possibilities," successfully concluded its Shenzhen and Chengdu stops. The conference brought together over 300 engineers, industry partners, and ecosystem developers from fields including communication networks, industrial control, automotive electronics, data centers, edge AI, and test & measurement. Participants engaged in in-depth exchanges on domestic FPGA technology innovation, AI inference system solutions, toolchain upgrades, and ecosystem co-building, jointly exploring new opportunities for domestic FPGAs!

New Product Launch: Full-Scenario Coverage from Low-Power Control to High-End Computing
At this conference, Pango Micro unveiled multiple new FPGA products, broadly covering rich application scenarios including servers, communications, data centers, LED large screens, industrial control, industrial robots, CMS electronic rearview mirrors, and high-end cockpit displays.

The Compa-2 series new device PG2C18 adopts a mature 55nm process and has been optimized and improved based on the first-generation PGC products. The PG2C18 increases device logic resource scale, supporting 18K LUTs, and enables package-compatible upgrades on original PGC devices. The series newly adds support for SEU hard core, APM units, and AES-128 encryption algorithms, adapting to more scenarios with high requirements for computing, reliability, and hardware security. The PG2C18 supports applications such as I3C and LTPI, suitable for industries including servers and communications.
The Elite-2 series new device PG2E35D adopts an innovative heterogeneous architecture with a built-in RISC-V processor hard core, supporting hard-core floating-point units, 160K ITCM and 32K DTCM, and multiple interfaces; 36K LUTs, 36 pairs of LVDS true differential, hard-core DDR2/3 controllers, hard-core ADC, and supports built-in DDR (128Mb or 256Mb), PU and PA bus high-speed interconnection, more than 190 user IOs, low power consumption, widely used in LED large screens, industrial control, industrial robots, and other fields.
The Titan-3 series new device PG3T1300 adopts FinFET process with a logic scale of up to 1.3KK, supporting high-speed DDR4/5 memory interfaces, multi-rate EMAC hard cores, PCIe hard cores, and high-speed SerDes interfaces, widely used in communications, data centers, network security, image and video processing, and other fields.
The Logos-2 series new device PG2L50M-5AMBG256 adopts a mature 28nm CMOS process with 45K logic scale, equipped with hard-core MIPI D-PHY at 2.5 Gbps per lane, supporting both Tx and Rx; it supports hard-core DDR4 interfaces, providing higher-speed storage solutions for complex image processing applications. The PG2L50M-5AMBG256 chip has obtained AEC-Q100 Grade 2 automotive certification, bringing more competitive solutions to segmented applications such as CMS electronic rearview mirrors, automotive LiDAR, and high-end cockpit displays.
System Innovation: AI Inference Reconfigurable Super Node Major Upgrade Released
As the parameter counts of large language model (LLM) algorithms continue to grow—such as Deepseek V4 pro with 1.6T parameters and Kimi K3 with 2.8T parameters—traditional AI inference all-in-one equipment faces challenges in deploying "full-blooded" versions, including storage bandwidth and cost-effective domestic supply chains. Addressing enterprises' and data centers' urgent demand for deploying the latest large models and their high attention to total cost of ownership (TCO) and return on investment (ROI), Pango Micro has重磅升级 released the "AI Inference Reconfigurable Super Node." This product uses "fully self-developed reconfigurable AI FPGA + innovative interconnect architecture" as dual engines, combining six major advantages: "extreme TCO cost-effectiveness, high energy efficiency, reconfigurability, low latency, scalability, and out-of-the-box readiness," opening a brand-new path for the efficient popularization of large model inference. It features four core highlights that reshape computing value:

Computing Power Equity: Extreme TCO Cost-Effectiveness. Breaking traditional computing power price barriers to achieve true "computing power equity." Enterprises need only pay 30%-50% of traditional deployment costs to own a full-blooded "trillion-parameter-level large model inference foundation," making top-tier AI capabilities truly within reach.
Hardware evolves in sync with algorithms: Dynamically reconfigurable compute precision, impervious to technological iteration. Powered by the underlying "reconfigurable characteristics," the hardware architecture can be dynamically reshaped as algorithms evolve. Whether for current or future new models, Day 0 rapid adaptation can be achieved. Say goodbye to "hardware obsolescence" anxiety and realize long-term asset value preservation with "buy once, use forever."
Full-power performance unleashed: Born for multi-Agent collaboration. No compromise on "dumbing down"! Devices ship with full-power, non-quantized versions of industry-leading SOTA (State-of-the-Art) large models such as DeepSeek V4 Pro and GLM-5.2 deployed by default. Native support for 1M ultra-long context (Long Context) and extremely high concurrent throughput, with ultra-low latency response, perfectly suited for future-oriented multi-Agent complex collaboration scenarios.
Minimalist delivery: Out-of-the-box elastic super nodes. Simplify the complex and say goodbye to lengthy deployment and debugging. The product delivers a true "out-of-the-box" experience with powerful "scalability." A single node can operate independently, and multiple nodes can seamlessly interconnect into large-scale compute clusters, flexibly meeting elastic compute demands from SMEs to large data centers.
Customer sharing: Real project practices, exploring new industry opportunities together
Pango Micro has always upheld the service philosophy of "customer first, efficient collaboration, value co-creation, and symbiotic win-win," working closely with customers in chip adaptation, customized solution development, major project delivery, and other areas.
At the conference, customers from segmented industries including Huayun Information, XGIMI Technology, and Hanque (Chengdu) Information Technology Co., Ltd. shared specific application cases and latest achievements of Pango Micro FPGA chips in fintech, next-generation display, satellite communications, and other fields based on actual projects, engaging with the audience to discuss future industry trends and opportunities.
Ecosystem collaboration: Building an innovation ecosystem integrating industry, academia, research, and application
A thriving industry ecosystem is the core支撑 for the continued advancement of the domestic FPGA industry. At this conference, Pango Micro joined hands with partners including ALINX, Tronlong, Xiaoyanjing Technology, UniVista, Sipode, and Beige Logic to share insights and create a solution exhibition area, comprehensively showcasing Pango Micro FPGA application cases in AI edge detection, automotive video capture and processing, ultra-high-definition image processing, industrial automation control, and other fields, attracting a large number of visitors.
Furthermore, amid the generative AI wave, Large Language Models (LLMs) are garnering significant attention in the chip design field. To this end, Pango Micro specially invited Di Zhixiong, Vice Dean of the School of Integrated Circuit Science and Engineering at Southwest Jiaotong University, to deliver a keynote titled "Controllable Intervention Points of LLM in FPGA Development: Methods, Boundaries, and Expectations," providing an in-depth analysis of how to effectively and controllably integrate LLM technology into FPGA design, systematically elaborating feasible technical paths and application boundaries, closely aligning with cutting-edge industry hotspots, and delivering a highly inspiring and forward-looking intellectual feast for the many engineers and developers in attendance.
Next stop, the "2026 Pango Micro Developer Conference" will continue in Hangzhou and Beijing. Stay tuned!
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