A domestic FPGA vendor is betting its next move on robot domain controllers. Zhongke Yihaiwei is building a joint laboratory with Academician Wang Yaonan's team and the Xiaoxiang Laboratory, focused on embodied intelligence domain controllers and dedicated chips. For engineers working on high-speed interfaces and boards, this signals that domestic programmable devices are looking for new landing scenarios beyond FPGA.
On November 11, Wang Yaonan, an academician of the Chinese Academy of Engineering, visited Zhongke Yihaiwei's Beijing base, accompanied by Xiangtou Fund chairman Yang Zhuolin and investment director Wu Yuanhang for discussions. Zhongke Yihaiwei presented its R&D achievements in FPGA, heterogeneous computing chips, and edge intelligent controllers, as well as progress on its Changsha embodied intelligence chip base. The two sides confirmed the next step: jointly building an "Embodied Intelligence Chip and Components Joint Laboratory" with the Xiaoxiang Laboratory, focusing on two directions—embodied intelligence domain controllers and embodied intelligence dedicated chips. During the discussion, Wang Yaonan described embodied intelligent robots as the fourth-generation intelligent terminal after personal computers, mobile phones, and new energy vehicles, and called chips and controllers the "core foundation" for robot perception, decision-making, and execution. Such positioning comes from an academician's remarks and is a directional judgment, not a product roadmap.
Zhongke Yihaiwei's existing strengths lie in programmable chips, EDA software, and hardware platforms; its official statement is that it continues to improve an integrated layout of chips, tools, and boards. This collaboration pushes it from general-purpose FPGA toward a specific category—robot controllers: domain controllers handle multi-sensor access and real-time decision-making, while dedicated chips are tailored for fixed workloads. The real question is that robot domain control's requirements for interface types, real-time performance, and functional safety differ from those of communications and industrial boards. Whether an FPGA vendor can translate programmable flexibility into a mass-producible controller solution depends on whether the joint laboratory can deliver engineered products rather than staying at the framework level. The source material did not disclose tape-out milestones, chip models, or timelines.
For domestic engineers working on high-speed interfaces and boards, this does not change selection in the short term: no chip models, interface specifications, or mass-production timelines have been announced, so existing FPGA solutions need not be adjusted because of this. In the medium term, if the domain controller direction lands, domestic programmable devices may gain an additional source of demand for boards and controller accessories, and toolchains will need to expand from pure logic development to sensor access and real-time control. On the supply chain side, the combination of the Changsha base and the Xiaoxiang Laboratory means greater weight for localized supporting resources, but capacity and process nodes have not been disclosed, so the impact on existing supply cannot yet be assessed.