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Industry Watch

FPGA Radar: October–November 2026 Highlights (Global + Domestic)

Editorial Board · Issue 202608 · High-Speed Interfaces and System Design

FPGA Radar: October–November 2026 Highlights (Global + Domestic)

Fig. FPGA Radar: October–November 2026 Highlights (Global + Domestic) · themed illustration

This issue’s radar covers: the maturing PCIe Gen5 ecosystem, Chinese FPGA tape-outs and launches, and open-source toolchain and university program progress through October–November.

■ Overseas Vendors
PCIe Gen5 Endpoint IP and Test Solutions Hit the Market
As Gen5 endpoint IP and test solutions land one after another, FPGA’s reconfigurability makes it the protocol pre-validation platform — link layers and protocol stacks are validated on FPGA before chip tape-out. Early Gen6 research is also entering labs, making the “FPGA-first” paradigm for high-speed interfaces even clearer.
■ China FPGA News
Chinese FPGA Tape-Out and Release Pace Accelerates
Next-generation products from multiple domestic vendors are entering tape-out/mass production; toolchain iteration has clearly sped up; automotive-grade certification is becoming a new competitive focus as Chinese FPGAs penetrate automotive electronics.
Source: EEFocus
■ Open-Source Ecosystem
More RISC-V Soft-Core Porting Cases on Domestic Devices
LiteX / Yosys communities stay active; porting cases for soft cores like VexRiscv and Ibex on domestic devices are increasing. Open-source toolchain device coverage keeps expanding, further lowering teaching and prototyping costs.
■ Industry Events
FPGA Innovation and Embedded Competitions Reach Finals
Industry–university joint courses are increasing; for students, this is an important window to join projects and build portfolios in the second half of the year.
Source: EEFocus
Next article · PCIe Gen5 Endpoint Design: From AXI to Link Training →
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