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fpga-ml-accelerator

工具链 thedatabusdotio

This repository hosts the code for an FPGA based accelerator for convolutional neural networks

EDA, simulation, synthesis and place-and-route tools — the infrastructure of the FPGA flow.

The project covers topics such as asic, digital-design, fpga, hardware, verification, verilog-hdl, vhdl.

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Stars198
Forks36
LanguageVerilog
Last push2024-06-20
Repositoryhttps://github.com/thedatabusdotio/fpga-ml-accelerator
Homepagehttps://thedatabus.io
View source and README on GitHub

Topics

asicdigital-designfpgahardwareverificationverilog-hdlvhdl

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