fpga.love ← Back to projects
Home / Projects / nvc

nvc

工具链 nickg

VHDL compiler and simulator

EDA, simulation, synthesis and place-and-route tools — the infrastructure of the FPGA flow.

The project covers topics such as compiler, fpga, simulator, verilog, vhdl.

This page is auto-synced from the repository metadata and refreshed weekly from GitHub.

Stars905
Forks127
LanguageC
LicenseGPL-3.0
Last push2026-11-09
Repositoryhttps://github.com/nickg/nvc
Homepagehttps://www.nickg.me.uk/nvc/
View source and README on GitHub

Topics

compilerfpgasimulatorverilogvhdl

Related projects