工具链 The-OpenROAD-Project
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
EDA、仿真、综合与布局布线类工具，属于 FPGA 开发流程的基础设施。
该项目主题覆盖 130nm、asic、caravel、foundry、klayout、magic、netgen、openram 等方向。
本页为仓库信息自动同步页，每周随 GitHub 数据更新；深度评测与实测文章见下方同类项目。